Padmi
Altera logo
Altera

FPGA design and development · Quartus Prime synthesis and timing analysis

DDR Memory Interface System Validation Lead Engineer

BangalorePosted 1 month ago
Electrical Electronics And Computer Hardware EngineeringSenior
Apply at Altera

Opens the source posting on naukri.com

Source description

About the role

View original

Bachelor s or Master s degree in Electrical Engineering,Computer Engineering,Electronics Engineering,or related field. . Minimum of 8+ years of industry experience in memory subsystem validation,silicon validation,or high-speed interface validation

One address, no account. We’ll tell you when matching roles go live.

More at Altera

Related open roles

View all roles
DDR Memory Interface System Validation Lead Engineer at Altera · Padmi