Senior Engineer, Physical Design Engineering

Senior/Lead PD Engineer ADI is looking for Senior/Lead PD Engineer for the development of complex mixed Signal SoCs. These chips are manufactured in most leading edge process nodes and high speed clock rates. These SoCs involve multiple processor cores and speed signal processing hardware running at high speed. Position Requirements BTech/MTech degree in Electrical/Electronic from a reputed institute with 4-8 years of experience in the field of Digital place and route Hands on experience with the implementation (PnR Signoff) of complex high speed SoC designs in cutting edge process technologies (22 nm, 16 nm, 7 nm, etc). Hands on experience in handling the tapeout of complex high speed SoC designs in cutting edge process technologies Floor Planning, Power Plan, Place and Route, Clock Planning and Clock Tree Synthesis, Parasitic Extraction Strong expertise in Static Timing analysis , constraint development and sign off. Innovate on the flows to meet the QoR targets and ensure predictability Good understanding on device/interconnect and circuit aspect of the complex UDSM technologies is an added advantage. Being proficient in TCL, Perl etc. Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days Disclaimer : This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.