RTL Design Engineer

Role Overview: Anthriq is looking for RTL engineers to join their team in building a compute-heavy multi-core vector processor with a custom ISA. They are seeking engineers who specialize in specific domains and can expand their expertise into adjacent areas. Key Responsibilities: - Datapath: Implement execution units, register files, floating-point arithmetic, and critical arithmetic paths. - Fabric & Interconnect: Develop a multi-stage switch fabric, high-speed serial interfaces, PCIe Gen3 x16 endpoint, and clock domain crossing logic. - Pipeline Control: Design instruction scoreboard, dispatch logic, DMA controller, IO FIFOs, and register file. - Orchestration & Integration: Construct system management controller, bus infrastructure, and top-level chip integration. - Peripherals & Security: Integrate memory controller, implement secure boot/key management, debug controller, and trace unit. - Performance & PPA: Conduct synthesis, identify critical timing paths, estimate power consumption, and maintain PPA dashboards. Qualifications Required: - 5+ years of RTL design experience in SystemVerilog. - Strong digital design fundamentals with the ability to work from specifications. - Comfortable working in a small team environment with a high level of ownership. About Anthriq: Anthriq is a signal processing infrastructure company specializing in building the full acquisition and compute stack for human-aware technology. Their Silicon division focuses on developing a custom ISA, signal-processing chip, and toolchain designed alongside the silicon. Please note that the company's website is anthriq.com/silicon for additional details. Role Overview: Anthriq is looking for RTL engineers to join their team in building a compute-heavy multi-core vector processor with a custom ISA. They are seeking engineers who specialize in specific domains and can expand their expertise into adjacent areas. Key Responsibilities: - Datapath: Implement execution units, register files, floating-point arithmetic, and critical arithmetic paths. - Fabric & Interconnect: Develop a multi-stage switch fabric, high-speed serial interfaces, PCIe Gen3 x16 endpoint, and clock domain crossing logic. - Pipeline Control: Design instruction scoreboard, dispatch logic, DMA controller, IO FIFOs, and register file. - Orchestration & Integration: Construct system management controller, bus infrastructure, and top-level chip integration. - Peripherals & Security: Integrate memory controller, implement secure boot/key management, debug controller, and trace unit. - Performance & PPA: Conduct synthesis, identify critical timing paths, estimate power consumption, and maintain PPA dashboards. Qualifications Required: - 5+ years of RTL design experience in SystemVerilog. - Strong digital design fundamentals with the ability to work from specifications. - Comfortable working in a small team environment with a high level of ownership. About Anthriq: Anthriq is a signal processing infrastructure company specializing in building the full acquisition and compute stack for human-aware technology. Their Silicon division focuses on developing a custom ISA, signal-processing chip, and toolchain designed alongside the silicon. Please note that the company's website is anthriq.com/silicon for additional details.