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Position:Engineer- FPGA DesignJob Description:- Functional Area: RTL design, Lower Power Synthesis, Low Power Design, UPF Flow - 3-8 years of experience in RTL design in Verilog, VHDL - ASIC/FPGA experience - If ASIC experience, then Lint/CDC tool experience - If FPGA experience, then Xilinx or Altera/Intel FPGA parts and tools - RTL debug experience - Knowledge of at least one industry standard protocols like I2C/SPI/UART, PCIe, MIPI, AXI, EthernetLocation:IN-GJ-Ahmedabad, India-Aryan Bld-2 (eInfochips)Time Type:Full timeJob Category:Engineering Services Position:Engineer- FPGA DesignJob Description:- Functional Area: RTL design, Lower Power Synthesis, Low Power Design, UPF Flow - 3-8 years of experience in RTL design in Verilog, VHDL - ASIC/FPGA experience - If ASIC experience, then Lint/CDC tool experience - If FPGA experience, then Xilinx or Altera/Intel FPGA parts and tools - RTL debug experience - Knowledge of at least one industry standard protocols like I2C/SPI/UART, PCIe, MIPI, AXI, EthernetLocation:IN-GJ-Ahmedabad, India-Aryan Bld-2 (eInfochips)Time Type:Full timeJob Category:Engineering Services
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