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About the role
About role: Are you passionate about semiconductor packaging and advanced package substrate design Join our team and work on cutting-edge technologies supporting next-generation high-performance computing, networking, AI, and consumer semiconductor products. Key Responsibilities Design and develop IC package substrate s for advanced semiconductor packages (FCBGA, FCCSP, SiP, Flip-Chip) Create substrate layouts including bump maps, ball maps, stack-ups, escape routing, and high-speed signal routing Perform package routing while considering Signal Integrity (SI), Power Integrity (PI), and manufacturabilit y Collaborate with cross-functional teams including IC, PCB, SI/PI, mechanical, and manufacturing engineers Generate fabrication outputs and ensure design compliance through DRC and design reviews Required Skills Experience i n IC Package Substrate Desi gn and package layouts Hands-on expertise wit h Cadence Allegro Package Designer (AP D) o r AP D+ Strong knowledge o f FCBGA, FCCSP, Flip-Chip, Wire Bond, S iP, and substrate technologies Good understanding o f Signal Integrity (SI), Power Integrity (PI), P DN, and package manufacturing processes Familiarity with interfaces such a s DDR/LPDDR, PCIe, USB, Ethernet, SerDes, or H BM is preferred . Preferred Qualifications Bachelor's or Master's degree in Electronics, Electrical Engineering, VLSI, or a related fie 7+ years of experience in semiconductor package substrate design Strong analytical, debugging, and communication skills
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