Sr Principal Verification Engineer

As a Sr Principal Verification Engineer at Cadence, you will play a crucial role in leveraging artificial intelligence to redefine the verification landscape in the semiconductor design industry. Your responsibilities will include: - Contributing to the application of machine learning techniques aimed at streamlining traditional pre-silicon functional verification methodologies like formal verification and UVM. - Developing agentic AI solutions using LLMs and latest ML technologies to accelerate pre-silicon Design Verification process. - Employing AI enhanced Electronic Design Automation (EDA) tools to improve and expedite both the design and verification lifecycles. - Engaging directly with customers to understand requirements and deliver innovative, practical verification strategies. - Collaborating effectively with machine learning and software engineering teams to validate output correctness, efficiency, and quality. - Maintaining current knowledge of advancements in AI-powered hardware verification and actively participating in fostering internal knowledge growth. Qualifications required for this role include: - Bachelor's or master's degree in electrical engineering, Computer Engineering, or related field. - Proven expertise of more than 12-15 years in at least one of the pre-silicon ASIC verification methodologies such as Formal, SV/UVM, and/or OVM. - Advanced skills in debugging pre-silicon verification failures using waveform viewers and simulation analysis tools. - Hands-on experience with industry standard EDA tools (e.g., Jasper, Xcelium, IMC). - Strong programming skills in Verilog, System Verilog, and Python. - Excellent communication skills and the ability to thrive in a team-oriented environment. - Self-motivated, with a proactive approach to problem-solving, continuous learning, and innovation. - Exposure to LLMs and ML technologies like RAG, RFT, RL, and Agentic frameworks would be a plus. At Cadence, you will have the opportunity to work on cutting-edge technology in a creative and innovative environment that encourages making a real impact. The company's employee-friendly policies focus on the well-being of employees, career development, learning opportunities, and celebrating success. The unique 'One Cadence One Team' culture promotes collaboration and ensures customer success. Join a diverse team of passionate individuals dedicated to solving challenges that matter. As a Sr Principal Verification Engineer at Cadence, you will play a crucial role in leveraging artificial intelligence to redefine the verification landscape in the semiconductor design industry. Your responsibilities will include: - Contributing to the application of machine learning techniques aimed at streamlining traditional pre-silicon functional verification methodologies like formal verification and UVM. - Developing agentic AI solutions using LLMs and latest ML technologies to accelerate pre-silicon Design Verification process. - Employing AI enhanced Electronic Design Automation (EDA) tools to improve and expedite both the design and verification lifecycles. - Engaging directly with customers to understand requirements and deliver innovative, practical verification strategies. - Collaborating effectively with machine learning and software engineering teams to validate output correctness, efficiency, and quality. - Maintaining current knowledge of advancements in AI-powered hardware verification and actively participating in fostering internal knowledge growth. Qualifications required for this role include: - Bachelor's or master's degree in electrical engineering, Computer Engineering, or related field. - Proven expertise of more than 12-15 years in at least one of the pre-silicon ASIC verification methodologies such as Formal, SV/UVM, and/or OVM. - Advanced skills in debugging pre-silicon verification failures using waveform viewers and simulation analysis tools. - Hands-on experience with industry standard EDA tools (e.g., Jasper, Xcelium, IMC). - Strong programming skills in Verilog, System Verilog, and Python. - Excellent communication skills and the ability to thrive in a team-oriented environment. - Self-motivated, with a proactive approach to problem-solving, continuous learning, and innovation. - Exposure to LLMs and ML technologies like RAG, RFT, RL, and Agentic frameworks would be a plus. At Cadence, you will have the opportunity to work on cutting-edge technology in a creative and innovative environment that encourages making a real impact. The company's employee-friendly policies focus on the well-being of employees, career development, learning opportunities, and celebrating success. The unique 'One Cadence One Team' culture promotes collaboration and ensures customer success. Join a diverse team of passionate individuals dedicated to solving challenges that matter.