ASIC Engineering Digital Design Leader

Role Overview: You will be the Digital Design Lead for the Client Optics Group (COG) at Cisco, providing essential technical leadership in the development of digital logic for silicon photonics to ensure high-performance outcomes for optical interconnects ranging from 100G to 400G. Your role will involve managing the full ASIC lifecycle, from architectural conception to post-silicon production support, while overseeing the integration of digital logic with analog and mixed-signal blocks. Key Responsibilities: - Lead all design activities from Pre-Silicon RTL to GDS2 signoff and Post-Silicon activities such as FPGA prototyping, Lab Validation, and ATE bring-up. - Architect and design complex digital blocks and CPU subsystems, working seamlessly across cross-functional teams to resolve design and technical issues. - Develop top and block-level specifications for high-speed datapath and low-speed control planes, including timing, power budgets, and hardware vs firmware partitioning. - Review verification coverage and sign off on coverage metrics, independently simulate, verify, and debug verification issues. - Contribute to FPGA prototyping and validation activities where applicable. Qualifications Required: - Bachelors or masters degree in electrical engineering, Electronics Engineering, or a related field. Masters degree strongly preferred - 12-16 years of industry experience with hands-on experience in digital design including FSM and CPU sub-systems, complex SOCs, and FPGA validation - Strong technical leadership experience of minimum 6 years - Familiarity with protocols such as SPI, I2C, APB, AXI, or similar interfaces and high-speed SerDes, Ethernet, D2D PHY IP, and protocols - Strong knowledge of ASIC/SoC design flow, including RTL development using SystemVerilog, simulation, lint, CDC/RDC, synthesis, formal/equivalence checking, DFT, and implementation handoff - Strong teamwork, communication, and organizational skills. Strong analytical, problem-solving, and debugging skills. Role Overview: You will be the Digital Design Lead for the Client Optics Group (COG) at Cisco, providing essential technical leadership in the development of digital logic for silicon photonics to ensure high-performance outcomes for optical interconnects ranging from 100G to 400G. Your role will involve managing the full ASIC lifecycle, from architectural conception to post-silicon production support, while overseeing the integration of digital logic with analog and mixed-signal blocks. Key Responsibilities: - Lead all design activities from Pre-Silicon RTL to GDS2 signoff and Post-Silicon activities such as FPGA prototyping, Lab Validation, and ATE bring-up. - Architect and design complex digital blocks and CPU subsystems, working seamlessly across cross-functional teams to resolve design and technical issues. - Develop top and block-level specifications for high-speed datapath and low-speed control planes, including timing, power budgets, and hardware vs firmware partitioning. - Review verification coverage and sign off on coverage metrics, independently simulate, verify, and debug verification issues. - Contribute to FPGA prototyping and validation activities where applicable. Qualifications Required: - Bachelors or masters degree in electrical engineering, Electronics Engineering, or a related field. Masters degree strongly preferred - 12-16 years of industry experience with hands-on experience in digital design including FSM and CPU sub-systems, complex SOCs, and FPGA validation - Strong technical leadership experience of minimum 6 years - Familiarity with protocols such as SPI, I2C, APB, AXI, or similar interfaces and high-speed SerDes, Ethernet, D2D PHY IP, and protocols - Strong knowledge of ASIC/SoC design flow, including RTL development using SystemVerilog, simulation, lint, CDC/RDC, synthesis, formal/equivalence checking, DFT, and implementation handoff - Strong teamwork, communication, and organizational skills. Strong analytical, problem-solving, and debugging skills.