Sr Staff Engineer & Technical Lead: AMS Verification

Location: Bangalore / Hyderabad Role: Sr. Staff Engineer / Technical Lead AMS Verification Experience: 10 – 18 Years Employment Type: Full-Time About Cyient Semiconductor Cyient Semiconductor is accelerating innovation across Automotive, Industrial, Communication, Data Center, Consumer Electronics, and AI-driven semiconductor solutions. We are looking for highly skilled AMS Verification professionals who can lead verification activities for complex Mixed-Signal and Analog SoCs while collaborating with global design teams. This is an excellent opportunity to work on next-generation semiconductor products involving Analog, Mixed-Signal, High-Speed Interfaces, PMICs, SerDes, PLLs, Data Converters, Sensor Interfaces, and Automotive-grade ICs. Position Summary We are seeking an experienced Sr. Staff Engineer / Technical Lead – AMS Verification to drive verification strategy, planning, execution, and signoff of complex Analog Mixed-Signal IPs and SoCs. The ideal candidate should possess strong expertise in AMS verification methodologies, SystemVerilog/UVM, Verilog-AMS, Real Number Modeling (RNM), Mixed-Signal simulation, and Analog Behavioral Modeling with hands-on experience in verifying high-performance analog and mixed-signal designs. The candidate will provide technical leadership, mentor engineers, and work closely with Analog Design, Digital Design, Architecture, and Validation teams to ensure first-pass silicon success. Key Responsibilities AMS Verification Leadership Lead AMS verification activities for complex Analog Mixed-Signal IPs and SoCs. Define verification methodology, architecture, and signoff strategy. Drive verification planning, coverage closure, and regression execution. Develop AMS verification environments from scratch. Guide teams on best verification practices and methodology enhancements. Verification Development Develop reusable verification environments using: SystemVerilog UVM Verilog-AMS RNM (Real Number Modeling) SystemVerilog Assertions (SVA) Create: Test Plans Testbenches Verification Components Functional Models Coverage Models Mixed-Signal Verification Verify complex AMS blocks such as: ADCs DACs PLLs DLLs LDOs PMICs Sensor Interfaces High-Speed Serial Interfaces Data Converters Validate interaction between Analog and Digital subsystems. Behavioral Modeling Develop and maintain: Analog Behavioral Models Verilog-A Models Verilog-AMS Models RNM Models Improve simulation performance through abstraction techniques. Coverage & Signoff Drive: Functional Coverage Code Coverage Assertion Coverage Track bug closure and verification metrics. Ensure verification completeness before tapeout. Cross-Functional Collaboration Work closely with: Analog Design Teams Digital Design Teams Physical Design Teams Validation Teams Product Engineers Participate in architecture reviews and design reviews. Technical Leadership Mentor and guide AMS verification engineers. Conduct code reviews and methodology reviews. Influence AMS verification roadmap across projects. Required Technical Skills AMS Verification Strong expertise in: AMS Verification Mixed-Signal Verification SoC Verification IP Verification Verification Languages SystemVerilog UVM Verilog Verilog-AMS Verilog-A Modeling Expertise Real Number Modeling (RNM) Behavioral Modeling Analog Abstraction Modeling System-Level Modeling Simulation Tools Strong hands-on experience with one or more: Cadence Xcelium AMS Virtuoso Spectre AMS Designer Synopsys VCS AMS CustomSim PrimeSim Siemens/Mentor Questa ADMS QuestaSim Desired AMS Domain Expertise Experience in verification of one or more: Power Management PMIC LDO Buck Converter Boost Converter Battery Management Systems (BMS) Data Converters ADC DAC Clocking Circuits PLL DLL Clock Generators Automotive ICs Functional Safety Designs Automotive Analog Subsystems AEC-Q100 Applications Communication Interfaces PCIe USB Ethernet MIPI SerDes Sensor Interfaces Imaging Automotive Sensors Industrial Sensors Preferred Qualifications Strong understanding of Analog and Digital design fundamentals. Experience with Functional Coverage and Assertion-Based Verification. Knowledge of Formal Verification concepts is a plus. Experience with scripting: Python Perl TCL Shell Experience in complete ASIC/SoC development lifecycle. Exposure to Silicon Validation and Post-Silicon Debug is desirable. Experience working with geographically distributed teams. Educational Qualification B.E./B.Tech/M.E./M.Tech in: Electronics & Communication Engineering Electrical Engineering Microelectronics VLSI Design Semiconductor Technology Preferred Candidate Profile Strong problem-solving and debugging skills. Excellent communication and stakeholder management abilities. Ability to lead technical discussions with architects and design teams. Passion for building scalable AMS verification methodologies. Proven track record of delivering first-pass silicon success. Why Join Cyient Semiconductor? Opportunity to work on cutting-edge AMS and SoC products Technical leadership role with high visibility Exposure to global semiconductor customers Collaborative and innovation-driven engineering culture Fast-growing semiconductor business with long-term career growth Interested candidates can share their updated resume with: Rajanikant.Sharma@cyientsemi.com Subject Line: Application – Sr. Staff Engineer / Technical Lead – AMS Verification