Engineer

We are seeking a highly skilled Physical Design Engineer to join our dynamic team. The successful candidate will be responsible for all aspects of physical design implementation, from RTL to GDSII, utilizing industry-standard tools and methodologies. This role offers the opportunity to work on cutting-edge semiconductor designs in a collaborative and fast-paced environment. Key Responsibilities: Work closely with RTL designers to understand design specifications and constraints. Perform floorplanning, power planning, and placement of digital blocks to meet timing, power, and area requirements. Implement clock tree synthesis (CTS) and perform routing to achieve timing closure and signal integrity goals. Conduct physical verification checks, including design rule checks (DRC) and layout versus schematic (LVS) checks. Collaborate with cross-functional teams, including design verification, CAD, and software engineering, to ensure successful tape-out of semiconductor designs. Drive continuous improvement initiatives to enhance physical design methodologies and optimize design processes. Requirements: Bachelor s degree in Electrical Engineering, Computer Engineering, or a related field; Master s degree preferred. 1-3 years of experience in physical design implementation for ASIC or FPGA designs. Proficiency in industry-standard EDA tools, including Cadence Encounter, Synopsys ICC, and Mentor Graphics Calibre. Strong understanding of ASIC design flows and methodologies, including RTL synthesis, timing closure, and physical verification. Experience with scripting languages such as Tcl, Perl, or Python for automation and design flow enhancements. Excellent problem-solving skills and attention to detail, with the ability to work effectively in a team environment. Benefits: Competitive salary and performance-based bonuses Comprehensive benefits package, including health insurance, retirement plans, and paid time off Opportunities for professional development and career growth Collaborative and innovative work environment with state-of-the-art facilitie Disclaimer : This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.