Design Verification Engineer

Role Overview: As a Verification Engineer at EdgeCortix, you will collaborate with design and architecture teams to create and enhance advanced verification environments for next-generation AI SoCs. Your contribution will be vital in ensuring the performance, reliability, and efficiency of our cutting-edge AI hardware products. Key Responsibilities: - Work closely with design architecture team to enhance IP, performance, and SoC-related verification - Develop verification infrastructure including VIPs, memory models, and monitors - Write configurable testbenches in SystemVerilog/UVM and automate testbench processes - Implement SystemVerilog assertions and maintain them - Create functional coverage and conduct code coverage analysis - Participate in ASIC power estimation and power-aware verification - Engage in Gate Level Simulation and Emulator activities - Automate tool flows and generate result reports Qualifications Required: - 6-7 years of experience in functional verification using SystemVerilog/UVM - Proficiency in verification techniques, including assertions and coverage-driven verification - Hands-on experience in building verification infrastructure from scratch - Familiarity with high-speed bus systems like AXI4 - Experience in verifying systems with PCIe, DDR, UCIe, Ethernet, or RISC-based CPU - Knowledge of Emulator-based verification and gate level simulations - Expertise in constraint random verification and coverage-driven methodology - Strong debugging skills in RTL and testbenches Additional Company Details: EdgeCortix is a deep-tech startup focused on revolutionizing edge computing with AI and silicon on chip design. Our goal is to enhance AI hardware development with energy-efficient solutions for various devices. With operations in Tokyo, Singapore, Virginia, California, and India, we offer a dynamic work environment and opportunities for professional growth. (Note: Additional company details have been summarized from the provided job description.) (Note: The "What's in it for you " and "Benefits and Perks" sections have been omitted as they were not included in the job description provided.) Role Overview: As a Verification Engineer at EdgeCortix, you will collaborate with design and architecture teams to create and enhance advanced verification environments for next-generation AI SoCs. Your contribution will be vital in ensuring the performance, reliability, and efficiency of our cutting-edge AI hardware products. Key Responsibilities: - Work closely with design architecture team to enhance IP, performance, and SoC-related verification - Develop verification infrastructure including VIPs, memory models, and monitors - Write configurable testbenches in SystemVerilog/UVM and automate testbench processes - Implement SystemVerilog assertions and maintain them - Create functional coverage and conduct code coverage analysis - Participate in ASIC power estimation and power-aware verification - Engage in Gate Level Simulation and Emulator activities - Automate tool flows and generate result reports Qualifications Required: - 6-7 years of experience in functional verification using SystemVerilog/UVM - Proficiency in verification techniques, including assertions and coverage-driven verification - Hands-on experience in building verification infrastructure from scratch - Familiarity with high-speed bus systems like AXI4 - Experience in verifying systems with PCIe, DDR, UCIe, Ethernet, or RISC-based CPU - Knowledge of Emulator-based verification and gate level simulations - Expertise in constraint random verification and coverage-driven methodology - Strong debugging skills in RTL and testbenches Additional Company Details: EdgeCortix is a deep-tech startup focused on revolutionizing edge computing with AI and silicon on chip design. Our goal is to enhance AI hardware development with energy-efficient solutions for various devices. With operations in Tokyo, Singapore, Virginia, California, and India, we offer a dynamic work environment and opportunities for professional growth. (Note: Additional company details have been summarized from the provided job description.) (Note: The "What's in it for you " and "Benefits and Perks" sections have been omitted as they were not included in the job description provided.)