FPGA RTL Design Engineer

As an FPGA RTL Design Engineer, you will play a crucial role in designing high-performance FPGA-based solutions for advanced 5G/wireless communication products. Your expertise in VHDL and high-speed packet processing will be essential for the successful execution of the following responsibilities: - Understand packet processing requirements from system architects - Design FPGA RTL architecture and microarchitecture - Develop and implement RTL using VHDL - Perform functional verification, linting, synthesis, and timing closure - Validate FPGA designs and optimize performance - Collaborate with verification and firmware teams for integration - Provide support for board bring-up and debugging activities - Optimize designs for power, performance, and area (PPA) To excel in this role, you should possess the following qualifications and skills: - Strong experience in FPGA RTL design using VHDL - Expertise in high-speed packet processing - Good understanding of FPGA design flow - Knowledge of synthesis, STA, and timing closure - Strong debugging and problem-solving capabilities - Preference for experience in wireless communication or 5G domain - Advantageous to have exposure to Altera Agilex or AMD Zynq RFSoC - Knowledge of DSP fundamentals and protocols like 5G, LTE, Wi-Fi is a plus - Familiarity with UVM/System Verilog is preferred If there are any additional details about the company in the job description, please provide them for a more comprehensive understanding. As an FPGA RTL Design Engineer, you will play a crucial role in designing high-performance FPGA-based solutions for advanced 5G/wireless communication products. Your expertise in VHDL and high-speed packet processing will be essential for the successful execution of the following responsibilities: - Understand packet processing requirements from system architects - Design FPGA RTL architecture and microarchitecture - Develop and implement RTL using VHDL - Perform functional verification, linting, synthesis, and timing closure - Validate FPGA designs and optimize performance - Collaborate with verification and firmware teams for integration - Provide support for board bring-up and debugging activities - Optimize designs for power, performance, and area (PPA) To excel in this role, you should possess the following qualifications and skills: - Strong experience in FPGA RTL design using VHDL - Expertise in high-speed packet processing - Good understanding of FPGA design flow - Knowledge of synthesis, STA, and timing closure - Strong debugging and problem-solving capabilities - Preference for experience in wireless communication or 5G domain - Advantageous to have exposure to Altera Agilex or AMD Zynq RFSoC - Knowledge of DSP fundamentals and protocols like 5G, LTE, Wi-Fi is a plus - Familiarity with UVM/System Verilog is preferred If there are any additional details about the company in the job description, please provide them for a more comprehensive understanding.