Senior Design Verification Engineer_USA Location

Were Hiring Design Verification Engineers | Min 4 to 20 Years Experience Greetings from Eximietas Design! We are looking for passionate Design Verification Engineers to join our growing VLSI team and work on next-generation SoC designs. Locations: Bengaluru | Pune | Hyderabad | Chennai | Ahmedabad USA: San Jose (Bay Area) / AustinUSA Eligibility: U.S. Permanent Residents (Green Card holders) only Key Qualifications ASIC / SoC Design Verification experienceStrong understanding of ASIC design concepts and verification flowExperience in IP, Subsystem, and SoC level verificationStrong SystemVerilog / UVM coding expertiseGood understanding of RAL methodology Protocol Experience AMBA protocols: AXI, APB, AHBLow-speed peripherals: I2C, SPI, QSPI, DMA, UART, GPIO, Interrupt ControllersHigh-speed protocols: PCIe, CXL, Ethernet, USBMemory protocols: DDR, LPDDR, HBM Tools & Methodologies Simulation tools: VCS, XceliumWaveform analyzers & Third-party VIP integrationVersion control: Git, SVN, PerforceExperience with GLS and Power Aware Simulation (UPF) Key Responsibilities Develop UVM testbench components (Driver, Monitor, Scoreboard)Define verification strategy, test plans & coverage plansImplement SystemVerilog assertions & functional coveragePerform coverage analysis and debug missing scenariosCollaborate with design, architecture, and pre/post-silicon teamsWork closely with customer leads and ensure verification sign-off Why Join Us Work on cutting-edge SoC and semiconductor technologies Collaborative and innovation-driven engineering culture Competitive compensation & benefits Strong focus on career growth and technical leadership Interested candidates can share their updated resume: maruthiprasad.e@eximietas.design Referrals are highly appreciated! Best Regards, Maruthy Prasaad Associate VLSI Manager Talent Acquisition Visakhapatnam +91 8088969910 #VLSI #DesignVerification #ASIC #UVM #SystemVerilog #SemiconductorJobs #Hiring #Eximietas .