Memory Design Engineer - SRAM and ROM

Title: Memory Design Engineer - SRAM and ROM Introduction: GlobalFoundries is looking for highly motivated Memory Design Engineer to work in the Memory IP group in the Global Organization, based in Bangalore. The successful candidate will work with 100% quality and minimal cycle time in mind. This role requires working closely with the internal design, layout teams, technology, test and product engineering teams. The roles and responsibilities will include the design, simulation and verification of custom memory design blocks like decoders, sense amplifiers, write drivers etc. Your Job: Developing CMOS memories such as SP SRAM, DP SRAM, Register File, and ROM. Circuit design, simulation, Margining and characterization of full custom circuits Functional simulations and statistical analysis Verifying bit cells, physical layout design and verification. Sign off and release the memory IP s on dedicated IP validation test chips Support Silicon bring-up and characterization Participate in implementation design/layout reviews Contribute with innovative ideas for addressing design problems Work closely and collaborate with IP design and layout teams Required Qualifications: Requires Bachelors/Master in Electrical (VLSI, Microelectronics and related fields) from a reputed university with Minimum 6-20 years Work/Industry experience Applicant should have a proficient knowledge of and experience with EDA (Cadence, Mentor Graphics, Synopsys ) tools for schematic design simulations (Virtuoso, Spectre, HSPICE, etc.) Experience in SRAM Memory designs Experience in timing characterization, Verilog is desirable General analog mixed-signal design concepts is desirable Circuit design, Reliability analysis, Statistical analysis of circuits Must have good technical verbal and written communication skills and ability to work with cross functional teams Be able to collaborate with technical design leads on multiple concurrent projects Preferred Qualifications: Knowledge in various technologies (Bulk, CMOS SOI) process is desirable Hands on knowledge of state-of-the-art memory or analog design flows Programming experience applicable to design flow automation tasks Dedication and the capability to work within a very dynamic interdisciplinary environment Knowledge of 45 /32 /28 /14nm and below technology nodes is an advantage. Ability to communicate as well as work efficiently in an international multi-disciplinary environment. Exceptional Spoken and Written Proficiency in English Strong analytical and problem-solving skills. Disclaimer : This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.