SMTS - Device Compact Modeling Engineer

Title- Device Compact Modeling Engineer Role Summary This position is for an experienced Device Compact modeling engineer. The candidate will be responsible for leading teams that extract transistor/passive models in CMOS BCD technology nodes supporting Power Product Line Roadmap within GlobalFoundries. Specific responsibilities will include modeling interface role to Fab and technology device teams, compact model correlation to hardware, targeting, benchmarking, test structure design, data collection and analysis, compact model extraction, and customer support/communication. Key Responsibilities Analyze and represent semiconductor devices with industry standard models. Applies knowledge of semiconductor physics and devices to evaluate and analyze test results Work closely/lead teams with device and other modeling engineers to interpret test results and debug device and measurement issues Prepare reports summarizing results or making technical recommendations. Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety Security requirements and programs Work and collaborate other projects and/or assignments as needed Create and maintain testcases for GlobalFoundries BCD transistor/passive models integration into PDK kits, perform simulations and physical quality assurance checks to ensure error free PDK kits delivery to customers. Run customer testcases/netlists for model QA/de-bugging. Create and update model release notes, model reference documents and application notes. Document any known limitations, issues, and solutions, in order to communicate relevant information on proper usage of the RF transistor model kits to GlobalFoundries customers. Customer communication and interaction is a key requirement Required Qualifications: Education and experience Masters/PhD degree in electrical engineering or related field + 10 years of experience in a closely related field in the industry Understanding of technologies contribution to market deployment strategy and customer acceptance. Very good understanding of device physics for bulk CMOS/BCD technologies and the correlation to devices performance. Expertise in model extraction for core/IO/HV devices in BCD technologies. Familiar and able to request/perform DC/AC/HV characterization and model extraction of bulk CMOS transistors/otjer passive devices using BSIM4.x, BSIM6 and PSP model architectures in SPECTRE and HSPICE model formats. Familiar with IP development requirements pertaining to device models. Able to design and coordinate layouts and device matrices planning for Modeling test chip development. Travel - Up to 10% Fluency in English Language written verbal Preferred Qualifications: Experience leading multidisciplinary projects or initiatives with high impact on the company s success. Familiarity with RF would be a definite plus. Experience coaching and mentoring junior engineers. Experience leading cross-functional teams across sites. Strong written and verbal communication skills. Strong planning organizational skills. Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.