Silicon Design Verification Engineer

As an Electrical Engineer with a passion for shaping the future of AI/ML hardware acceleration, you will be a crucial part of the team driving cutting-edge TPU (Tensor Processing Unit) technology at Google. Your role will involve verifying complex digital designs, particularly focusing on TPU architecture and its integration within AI/ML-driven systems. Key Responsibilities: - Plan the verification of digital design blocks and collaborate with design engineers to identify crucial verification scenarios. - Identify and define all types of coverage measures for stimulus and corner-cases. - Collaborate with design engineers to debug tests and ensure the delivery of functionally correct design blocks. - Measure and identify verification gaps, demonstrating progress towards tape-out. - Develop a constrained-random verification environment using SystemVerilog and Universal Verification Methodology (UVM). Qualifications Required: - Bachelor's degree in Electrical Engineering or equivalent practical experience. - 1 year of experience with verification methodology such as Universal Verification Methodology (UVM). - 1 year of experience in verifying IP designs like IP, SoC, vector CPUs, etc. - Proficiency in SystemVerilog, SystemVerilog Assertions (SVA), and functional coverage. About the company: Google's AI and Infrastructure team is at the forefront of innovation, empowering global customers with breakthrough capabilities and insights through AI and Infrastructure solutions. They are committed to equal employment opportunity and diversity, fostering an inclusive workplace for all employees. If you have a Master's degree in Electrical Engineering or a related technical field, experience with industry-standard simulators and regression systems, and a background in AI/ML accelerators or vector processing units, you are encouraged to apply. Join the team at Google and be a part of shaping the future of world-leading hyperscale computing. As an Electrical Engineer with a passion for shaping the future of AI/ML hardware acceleration, you will be a crucial part of the team driving cutting-edge TPU (Tensor Processing Unit) technology at Google. Your role will involve verifying complex digital designs, particularly focusing on TPU architecture and its integration within AI/ML-driven systems. Key Responsibilities: - Plan the verification of digital design blocks and collaborate with design engineers to identify crucial verification scenarios. - Identify and define all types of coverage measures for stimulus and corner-cases. - Collaborate with design engineers to debug tests and ensure the delivery of functionally correct design blocks. - Measure and identify verification gaps, demonstrating progress towards tape-out. - Develop a constrained-random verification environment using SystemVerilog and Universal Verification Methodology (UVM). Qualifications Required: - Bachelor's degree in Electrical Engineering or equivalent practical experience. - 1 year of experience with verification methodology such as Universal Verification Methodology (UVM). - 1 year of experience in verifying IP designs like IP, SoC, vector CPUs, etc. - Proficiency in SystemVerilog, SystemVerilog Assertions (SVA), and functional coverage. About the company: Google's AI and Infrastructure team is at the forefront of innovation, empowering global customers with breakthrough capabilities and insights through AI and Infrastructure solutions. They are committed to equal employment opportunity and diversity, fostering an inclusive workplace for all employees. If you have a Master's degree in Electrical Engineering or a related technical field, experience with industry-standard simulators and regression systems, and a background in AI/ML accelerators or vector processing units, you are encouraged to apply. Join the team at Google and be a part of shaping the future of world-leading hyperscale computing.