Source description
About the role
Role Overview: Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. Contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As the Application-Specific Integrated Circuit (ASIC) Silicon Design Verification Engineer, you will lead the development of verification content and drive hardware-software co-verification strategies, focusing on bridging the gap between RTL simulation and emulation platforms. Key Responsibilities: - Verify designs using verification techniques and methodologies. - Work cross-functionally to debug failures and verify the functional correctness of the design. - Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use. - Develop and execute performance verification plans for compute clusters and analyze architectural bottlenecks of Google's Tensor System on a chip (SoC). - Analyze pipeline stalls, branch mispredictions, and memory subsystem bottlenecks to identify deviations from the performance model and architecture projections. Qualifications Required: - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. - 4 years of experience in SoC design/verification. - Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture. - Experience in low-power design verification. - Knowledge of performance and latency architecture for an ARM based SoC. Role Overview: Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. Contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. As the Application-Specific Integrated Circuit (ASIC) Silicon Design Verification Engineer, you will lead the development of verification content and drive hardware-software co-verification strategies, focusing on bridging the gap between RTL simulation and emulation platforms. Key Responsibilities: - Verify designs using verification techniques and methodologies. - Work cross-functionally to debug failures and verify the functional correctness of the design. - Provide test plans, including verification strategy, environment, components, stimulus, checks, and coverage, and ensure documentation is easy to use. - Develop and execute performance verification plans for compute clusters and analyze architectural bottlenecks of Google's Tensor System on a chip (SoC). - Analyze pipeline stalls, branch mispredictions, and memory subsystem bottlenecks to identify deviations from the performance model and architecture projections. Qualifications Required: - Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. - 4 years of experience in SoC design/verification. - Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science, with an emphasis on computer architecture. - Experience in low-power design verification. - Knowledge of performance and latency architecture for an ARM based SoC.
More at Google
Related open roles
Silicon Engineer
Bangalore · Onsite
Coherent NoC IP Design Engineer
Bangalore
Silicon Emulation Engineer III
Bangalore
Senior TPU RTL Design Engineer, Networking, Inter-Chip Interconnects
San Francisco Bay Area · Onsite
Staff Hardware System Architect, Pixel Watch
San Francisco Bay Area · Onsite
Senior Signal and Power Integrity Engineer, Pixel
New Taipei · Onsite