Application Specific Integrated Circuit Verification Engineer

Role Overview: As a highly accomplished Design Verification Engineer (DV) at HCLTech, you will be responsible for leading the verification of critical ASIC and SoC programs. Your role will involve defining and implementing verification strategies, developing robust verification environments, leveraging advanced methodologies, debugging failures, driving code quality, mentoring junior engineers, and staying updated on emerging technologies. Key Responsibilities: - Lead and define end-to-end verification strategy for complex ASIC/SoC programs - Architect and develop robust UVM-based verification environments and testbenches - Leverage advanced verification methodologies such as UVM, Formal Verification, and Assertions - Work hands-on with industry-leading tools including simulators, formal tools, and debuggers - Debug complex failures, perform root-cause analysis, and collaborate with design teams - Drive code quality, enforce best practices, and participate in design/code reviews - Mentor and guide junior DV engineers to foster a high-performance technical culture - Stay ahead of emerging verification technologies, tools, and methodologies - Influence the verification roadmap and contribute to technical decision-making Qualifications: - Master's (preferred) or Bachelor's degree in Electrical/Computer Engineering - 6+ years of experience in Design Verification for complex ASIC/SoC designs - Hands-on expertise with UVM, SystemVerilog, Verilog/VHDL, and Assertions - Deep understanding of digital design fundamentals - Strong experience with simulators, formal verification tools, and scripting (Perl/Python/Tcl) - Proven track record of leading verification teams and driving project success - Excellent communication, leadership, analytical, and troubleshooting skills - Ability to handle multiple priorities and deliver under aggressive timelines Additional Details: Not available in the provided Job Description. If you are passionate about leading verification projects for cutting-edge semiconductor technologies and are looking for a dynamic work culture that fosters career growth and technical leadership opportunities, apply now by sharing your profile at the mentioned email address. Role Overview: As a highly accomplished Design Verification Engineer (DV) at HCLTech, you will be responsible for leading the verification of critical ASIC and SoC programs. Your role will involve defining and implementing verification strategies, developing robust verification environments, leveraging advanced methodologies, debugging failures, driving code quality, mentoring junior engineers, and staying updated on emerging technologies. Key Responsibilities: - Lead and define end-to-end verification strategy for complex ASIC/SoC programs - Architect and develop robust UVM-based verification environments and testbenches - Leverage advanced verification methodologies such as UVM, Formal Verification, and Assertions - Work hands-on with industry-leading tools including simulators, formal tools, and debuggers - Debug complex failures, perform root-cause analysis, and collaborate with design teams - Drive code quality, enforce best practices, and participate in design/code reviews - Mentor and guide junior DV engineers to foster a high-performance technical culture - Stay ahead of emerging verification technologies, tools, and methodologies - Influence the verification roadmap and contribute to technical decision-making Qualifications: - Master's (preferred) or Bachelor's degree in Electrical/Computer Engineering - 6+ years of experience in Design Verification for complex ASIC/SoC designs - Hands-on expertise with UVM, SystemVerilog, Verilog/VHDL, and Assertions - Deep understanding of digital design fundamentals - Strong experience with simulators, formal verification tools, and scripting (Perl/Python/Tcl) - Proven track record of leading verification teams and driving project success - Excellent communication, leadership, analytical, and troubleshooting skills - Ability to handle multiple priorities and deliver under aggressive timelines Additional Details: Not available in the provided Job Description. If you are passionate about leading verification projects for cutting-edge semiconductor technologies and are looking for a dynamic work culture that fosters career growth and technical leadership opportunities, apply now by sharing your profile at the mentioned email address.