DFT Design Engineer

Shift: Shift 1 (India). Primary Location: India,Bangalore. Additional Locations: . Required expertise includes TAP / JTAG,IJTAG (IEEE 1687),Boundary Scan (IEEE 1),MBIST,Scan Compression,ATPG,Verilog / System Verilog,Tcl / Perl/Python scripting,DFT verification,silicon debug,and strong communication and technical leadership skills. . .