Validation/ Emulation Engineers

Responsible for verifying challenging ASIC/ SoC on Emulator. We prefer an individual who can demonstrate good technical leadership skills and can lead feature verification and validation. Job Requirements: 3- 8 Years of Experience in Physical Design BE/ BTECH/ ME/ MTECH in EC/ EE/ CS or related field Own creation of validation and emulation test plans, develop tests and validate the chiprsquos functionality. Experienced in debug on Palladium (Emulation) and on Si platforms Good understanding of PCIE/ USB/ Ethernet protocols Good programming skills in Verilog and shell scripts is a must Experience with high speed analyzers, scopes, chillers and other test equipment ASIC/ SoC on Emulator.