Senior RTL Design Engineer

As an Architect and designer of ultra-low-power digital systems for next-gen wearables powered by breakthrough Wi-R technology, your role at Ixana will involve the following key responsibilities: - Micro-architect, implement, and optimize RTL for control and data path blocks in communication SoCs. - Lead digital block design efforts in collaboration with system architects and analog teams. - Conduct RTL linting, simulation, CDC/DRC checks, and gate-level simulations. - Participate in ECOs, MBIST/DFT integration, and low-power verification flows. - Engage in RTL design reviews, power-aware simulation (e.g., VCS-NLP), and multi-power domain verification using UPF. - Integrate hardmacros into digital designs and ensure timing closure using STA/PNR tools. Qualifications required for this role include: - Bachelor's degree in Science, Engineering, or a related field. - Experience as a block or chip lead for digital blocks that succeeded in silicon, preferably in AMS-focused chips, or a GPA 9/10 from IITs, JU, or VIT with a strong foundation in digital design. - 2+ years of RTL design/verification experience (5+ years preferred). - Proficiency in RTL (Verilog/VHDL), simulation tools, linting, CDC/DRC flows, ASIC ECO flows, RTL sanity tools, MBIST, and DFT insertion. - Strong debugging skills using simulation and waveform tools. Preferred qualifications include: - 5+ years of ASIC design/verification experience. - Scripting skills in Tcl, Perl, or Python. - Experience with DSP, wireless communication circuits, and low-power digital design. - Knowledge of STA, PNR tools, and hardmacro integration workflows. - Power-aware design experience using UPF and simulators like VCS-NLP. - Excellent communication and documentation skills. Ixana, a Purdue University spinoff, is revolutionizing brain-inspired wearable computing with its patented Wi-R technology. Wi-R enables energy-efficient communication through non-radiative near-field communication, making long-term wearable and implantable devices practical. Join the 60-person team at Ixana to work on cutting-edge technology that has real-world impact across various industries. Ixana offers competitive compensation, relocation support, and a culture of innovation and collaboration. If you are passionate about deep tech and want to make a difference in human-computer interaction, apply now and be part of a team that is redefining the future. As an Architect and designer of ultra-low-power digital systems for next-gen wearables powered by breakthrough Wi-R technology, your role at Ixana will involve the following key responsibilities: - Micro-architect, implement, and optimize RTL for control and data path blocks in communication SoCs. - Lead digital block design efforts in collaboration with system architects and analog teams. - Conduct RTL linting, simulation, CDC/DRC checks, and gate-level simulations. - Participate in ECOs, MBIST/DFT integration, and low-power verification flows. - Engage in RTL design reviews, power-aware simulation (e.g., VCS-NLP), and multi-power domain verification using UPF. - Integrate hardmacros into digital designs and ensure timing closure using STA/PNR tools. Qualifications required for this role include: - Bachelor's degree in Science, Engineering, or a related field. - Experience as a block or chip lead for digital blocks that succeeded in silicon, preferably in AMS-focused chips, or a GPA 9/10 from IITs, JU, or VIT with a strong foundation in digital design. - 2+ years of RTL design/verification experience (5+ years preferred). - Proficiency in RTL (Verilog/VHDL), simulation tools, linting, CDC/DRC flows, ASIC ECO flows, RTL sanity tools, MBIST, and DFT insertion. - Strong debugging skills using simulation and waveform tools. Preferred qualifications include: - 5+ years of ASIC design/verification experience. - Scripting skills in Tcl, Perl, or Python. - Experience with DSP, wireless communication circuits, and low-power digital design. - Knowledge of STA, PNR tools, and hardmacro integration workflows. - Power-aware design experience using UPF and simulators like VCS-NLP. - Excellent communication and documentation skills. Ixana, a Purdue University spinoff, is revolutionizing brain-inspired wearable computing with its patented Wi-R technology. Wi-R enables energy-efficient communication through non-radiative near-field communication, making long-term wearable and implantable devices practical. Join the 60-person team at Ixana to work on cutting-edge technology that has real-world impact across various industries. Ixana offers competitive compensation, relocation support, and a culture of innovation and collaboration. If you are passionate about deep tech and want to make a difference in human-computer interaction, apply now and be part of a team that is redefining the future.