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About the role
A major success factor for the company continues to be the development and deployment of breakthrough digital and mixed-signal Application Specific ICs (ASICs) that drive performance and value in new products Responsibilities may include digital architecture definition, digital signal processing algorithm development, digital flow support, IP integration, RTL design, and verification of digital and mixed-signal ASICs from the block, subsystem, top-level, and FPGA cosim levels of the IC hierarchy You ll collaborate locally and globally in a complete ASIC development team including digital, analog, physical design, flow/tools, DFT, test, packaging, and NPI functions with access to world-leading semiconductor and foundry solutions You ll have the opportunity to work with our world-class data converter IP, invent new DSP algorithms to minimize analog impairments, and help enable breakthroughs in high-performance measurement circuits This role will be part of Keysight Laboratories, a world-renowned technology organization which enables Keysight to be first to market with breakthrough, highly differentiated and market leading solutions Our dedicated team of seasoned engineers has enabled countless innovations and inventions over many generations of ASIC and product development, spanning all corners of the technology landscape Qualifications BS/MS in Electrical Engineering or Computer Engineering 6+ years of experience in the design and verification of digital or mixed signal ASICs Strong EE fundamentals with experience in ASIC Design, DSP, digital architectures, and verification of large ASIC designs Experience with ASIC/FPGA design flow, methodologies, and process Solid mathematical background with fluency in DSP theory and digital design techniques Proficiency in software models and their usage in the design, verification, and programming of an ASIC Fluency with object-oriented programming Strong teamwork and written/verbal communication skills Leadership skills to drive change and influence teams toward execution goals
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