Principal Architect - RTL Design

Bachelors or Masters degree in Electrical Engineering,Computer Engineering,or related field Hands-on expertise in Verilog / SystemVerilog,C / C++,and scripting (Python / Tcl/Perl) Preferred Qualifications: Experience with AI accelerators,DSPs,or high-performance CPUs / GPUs 10+ years of experience in SOC design,SOC architecture,RTL design,micro-architecture