Staff To Senior Staff Engineer, DFT

As a Digital IC Design Staff Engineer with Marvell, you'll be a member of the Switch DFT team part of Data center Engineering business group. Switch DFT team is responsible for overall DFT solution implemented in all Marvell Switch products. The team owns DFT Strategy, DFT Architecture, DFT IPs and all aspects of SoC MBIST and ATPG definition, implementation, validation pre and post-Si. What You Can Expect As a part of the DFT team the suitable candidate will work on all aspects of DFT in top notch Switch products: DFT architecture and Testability strategy, Flow, Implementation, Verification and post Si bring up. you'll work closely with other DFT team members for DFT features Implementation, Integration and Verification in SoC. You will also have close interaction with Logic Design/Physical design/STA/ATE teams as needed. What we're Looking For Bachelor s/Masters degree in Computer Science, Electrical Engineering or related fields and > 5 years of related professional experience in DFT. The candidate Marvell is looking for will have: Very good knowledge on SCAN/ATPG/JTAG/MBIST Proven experience on Test structures for DFT, IP Integration, ATPG Fault models, test point insertion, coverage improvement techniques Proven experience in Scan insertion techniques at block level and Chip top level Good knowledge on Test mode timing constraints Proven experience on gate level simulations with no-timing and SDF based simulations for DFT modes Cross domain knowledge to resolve DFT issues with design, synthesis, Physical design, STA team Proficiency in Industry standard Tools for Scan insertion, ATPG, MBIST and JTAG. (Preferably Mentor/Synopsys tools) Good Knowledge and understanding on JTAG for IEEE1149.1/6 standards Experience with Post-Si ramp up and debug on ATE Good hands on experience on Memory BIST generation, Insertion, verification on RTL/Netlist level Good knowledge on Perl/ Tcl scripting skills. Very good team player capabilities and excellent communication skills to work with a variety of teams across the global organization High sense of responsibility and ownership within the team for successful Tapeout and Post -Si ramp up of the project