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About the role
Education Qualification: . Bachelors / Master degree in electrical / electronic engineering or similar . Should be able to handle LP-aware synthesis of SoC,tweak the flow to meet PPA targets . Should be able to debug and resolve RTL2N LEC,N2N,LP-LEC issues . Should be able to run CLP and resolve gate level CLP violations . Experience (years) : 7+ years
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