Source description
About the role
Implement and optimize FPGA-based solutions for 5G Radio Unit platforms, emphasizing Digital Front End (DFE) and High-PHY processing functions. Integrate and validate FPGA IP blocks for signal processing, including digital up/down conversion, filtering, CFR, DPD, beamforming, and timing synchronization. Implement High-PHY processing functions like FFT/IFFT, resource mapping, modulation, coding interfaces, and MIMO processing. Develop and maintain RTL code using VHDL, Verilog, or SystemVerilog, adhering to coding standards and implementation methodologies. Optimize solutions for AMD Versal adaptive SoCs, including Programmable Logic, Processing System, Network-on-Chip, and AI Engine subsystems. Implement and optimize AI Engine-based signal processing functions for DFE and High-PHY applications, ensuring efficient resource utilization. Support hardware/software co-design activities involving AI Engine kernels, FPGA fabric, and high-speed communication interfaces. Perform FPGA synthesis, place-and-route, timing closure, and power analysis, ensuring optimal resource utilization and performance. Integrate FPGA designs with embedded processors, RF transceivers, and system-level software components for seamless operation. Develop and execute verification activities, including simulation, testbench development, and hardware validation, to ensure functionality.
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