Senior Lead Engineer Memory design

As a Lead Memory Design Engineer at NXPs NVM IP design group in Bangalore, India, you will play a crucial role in managing a multi-technology NVM IP portfolio. Your primary responsibilities will include ensuring the highest level of quality, developing automated IP management solutions, and collaborating with 3rd-party NVM IP vendors and NXP product design teams. This collaboration aims to enable high-quality and scalable NVM IP solutions across all NXPs vertical markets. Key Responsibilities: - Benchmarking NVM IP for specific product-technology requirements - Executing IP onboarding, including IP design kit preparation and verification, and releasing to SoC design teams - Supporting SoC teams with NVM IP integration and troubleshooting - Developing an automated IP onboarding and release flow for efficient execution - Maintaining a portfolio of 3rd-party NVM and NXP-proprietary NVM IP across various technologies from 180nm to 5nm - Directly interacting with 3rd-party vendors and silicon foundries - Collaborating with NXP NVM design teams in Bangalore, EU, and US - Mentoring junior engineers in the NVM field Qualifications Required: - BS or MS in Electrical Engineering - +7 years of experience in Analog design/Memory design (SRAM/NVM)/IO design/standard cell circuit design - Hands-on experience in scripting and flow automation - Familiarity with quality managed design flows, tools, and methodologies (Cadence and Synopsys) - Knowledge of NVM technology, macro architecture, and design - Excellent communication skills and experience in cross-country team collaboration As an integral part of NXPs NVM design department, you will lead the way in NVM IP benchmarking, onboarding, release, and support for a diverse range of NVM platforms. Your expertise and leadership will contribute to the successful implementation of high-quality NVM IP solutions in various markets. As a Lead Memory Design Engineer at NXPs NVM IP design group in Bangalore, India, you will play a crucial role in managing a multi-technology NVM IP portfolio. Your primary responsibilities will include ensuring the highest level of quality, developing automated IP management solutions, and collaborating with 3rd-party NVM IP vendors and NXP product design teams. This collaboration aims to enable high-quality and scalable NVM IP solutions across all NXPs vertical markets. Key Responsibilities: - Benchmarking NVM IP for specific product-technology requirements - Executing IP onboarding, including IP design kit preparation and verification, and releasing to SoC design teams - Supporting SoC teams with NVM IP integration and troubleshooting - Developing an automated IP onboarding and release flow for efficient execution - Maintaining a portfolio of 3rd-party NVM and NXP-proprietary NVM IP across various technologies from 180nm to 5nm - Directly interacting with 3rd-party vendors and silicon foundries - Collaborating with NXP NVM design teams in Bangalore, EU, and US - Mentoring junior engineers in the NVM field Qualifications Required: - BS or MS in Electrical Engineering - +7 years of experience in Analog design/Memory design (SRAM/NVM)/IO design/standard cell circuit design - Hands-on experience in scripting and flow automation - Familiarity with quality managed design flows, tools, and methodologies (Cadence and Synopsys) - Knowledge of NVM technology, macro architecture, and design - Excellent communication skills and experience in cross-country team collaboration As an integral part of NXPs NVM design department, you will lead the way in NVM IP benchmarking, onboarding, release, and support for a diverse range of NVM platforms. Your expertise and leadership will contribute to the successful implementation of high-quality NVM IP solutions in various markets.