Senior PnR (Place and Route) Engineer

You should have physical design experience, with recent successful tapeouts in deep submicron technology and FinFet technology. Knowledgeable in partition level P&R implementation, including floorplanning, clock & power distribution, timing closure, physical & electrical verification Strong knowledge of PD construction & analysis flows and methodology Ability to execute to stringent schedule & die size requirements Strong communication skills Experienced in industry standard tools, understand their capabilities and underlying algorithms Experience with large SOC/IP designs with frequencies in excess of 500Mhz Ability to resolve design and flow issues related to physical design, identify potential solutions and drive execution