Source description
About the role
Define overall verification strategies, methodologies, and simulation environment Work with RTL designers, system architects and block level verification engineers to develop top level verification requirements and test plans based on specifications. Develop, maintain and publish verification specifications. Analyze and debug simulation failures Generates code coverage and functional coverage report Run gate level simulation and debug them. Perform the constraint assertion-based verification
More at Omni Design Technologies
Related open roles
System on a Chip Architect
India
Principal / Lead DSP & Systems Architect — Ultra High-Speed SerDes
San Francisco Bay Area · Onsite
Senior Hardware Engineer
San Francisco Bay Area · Hybrid
Principal / Lead Wireless Communications System Architect
San Francisco Bay Area · Hybrid
Chip Lead: Analog & Mixed-Signal Layout Engineer
Bangalore
Chip Lead: Analog & Mixed-Signal Layout Engineer
San Francisco Bay Area · Hybrid
