Systems and Validation Lead/Manager

BSEE Required, MSEE Preferred

8+ years of systems hardware development and debug experience, including for digital, multi-gigabit, and high frequency, low noise analog interfaces

Deep knowledge of signal integrity and power integrity design practices

Knowledge of at least 2 of electrical interfaces for any of the high-speed protocols: USB3+; PCIe 2/3; ThunderBolt, DisplayPort; HDMI; SATA/SAS, Ethernet, LPDDR4/5, GMSL

Knowledge of inter-chip protocols, such as UART, I2C, I3C, SPI, I2S, PWM

Knowledge of microcontroller and FPGA development and development environments

Familiarity with Verilog

Software development and debugging experience in C, C++, and Python and other scripting languages

Ability to develop test scripts that control test equipment for determining IC device characteristics

Familiarity with test equipment, including oscilloscope, sampling scope, BERT (including CDR), protocol analyzer, spectrum analyzer, VNA, TDR, and other basic equipment

Understanding of mechanical and thermal concepts

Extensive protocol testing experience with any of the above protocols including a good understanding of the required test infrastructure.

Experience in creating and simulating models of wired links and being able to make appropriate tradeoffs.

Team player with interest in filing up gaps in product development, as needed.