Source description
About the role
Define the architecture of embedded NVM IP including EEPROM, ReRAM, and embedded Flash.
Develop memory architecture specifications covering:
Array organization
Peripheral architecture
High-voltage generation
Read/write algorithms
Program/erase operations
ECC implementation
Redundancy
Built-In Self Test (BIST)
DFT architecture
Security features
Collaborate with process integration teams to optimize memory bitcells and process options.
Define memory compiler requirements supporting multiple capacities, word widths, redundancy options, and customer configurability.
Lead architecture reviews and technical decision making across cross-functional teams.
Develop product roadmaps for next-generation embedded NVM technologies.
Drive silicon bring-up, characterization, failure analysis, and design improvements.
Support customer engagements on architecture, reliability, qualification, and technology capabilities.
Mentor junior architects and design engineers.
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