Sr Principal Analog Design Engineer

Key Responsibilities

Analog IP Architecture & Design

Architect, design, and deliver analog IP blocks for:

Power management (e.g., regulators, monitors, biasing)

Clock generation and distribution (e.g., PLLs, oscillators, clock monitors)

Error detection, monitoring, and safety-related analog circuitry

Drive designs from concept and architecture through schematic, simulation, layout collaboration, and silicon validation .

Ensure designs are robust, reusable, and scalable across Treo™ platform derivatives.

Production & Quality Ownership

Own analog IP blocks that tape out and go to volume production , meeting performance, yield, and reliability targets.

Act as a design quality reviewer , providing thorough technical reviews of:

Schematics

Simulation plans and results

Layout considerations

Documentation and sign-off readiness

Champion best practices in analog design quality , robustness, and documentation.

SoC Integration & Cross-Disciplinary Collaboration

Deliver analog IP into a digital-on-top SoC flow , supporting:

Clear interface definitions

Digital control and status visibility

Power, clock, and reset integration

Work closely with:

Digital design teams

Verification teams

Physical design and layout engineers

Systems and product engineering

Support top-level integration, bring-up, and debug activities as needed.

Automotive & Functional Safety

Design and deliver analog IP compliant with automotive-grade requirements , including:

Reliability

Diagnostic coverage

Fault tolerance and detection

Apply functional safety concepts (e.g., ISO 26262) at the IP level, including:

Safety mechanisms

Redundancy and monitoring

Support for ASIL-driven requirements

Collaborate with safety and systems teams to ensure traceability from requirements to implementation.

Technical Leadership & Mentorship

Mentor and guide junior and mid-level analog engineers , fostering technical growth and design excellence.

Provide hands-on coaching in:

Analog fundamentals

Debug and failure analysis

Design trade-offs and architecture decisions

Serve as a technical role model within the Cork analog design organization.