Sr Principal ASIC / RTL Design Engineer

OnSemi is seeking a Senior Principal Digital Design Engineer, NEW PRODUCT DEVELOPMENT, Power Management, to join our growing team in Bengaluru, India. This group is responsible for development of Power management products including DC-DC PMIC/POL, Multiphase controllers, Dr. MOS, AC-DC converters, LED drivers, SiC drivers, Switches and efuses for consumer, industrial and automotive applications.

#LI-VS1

Qualification BE in Electrical Engineering or related +14 years of experience, or MS + 12 years of experience in RTL design/development Experience in working and leading Digital Design, Architecture and ASIC/Mixed signal chip developments The ideal candidate should have thorough understanding of the end-to-end digital design flow to accurately and efficiently collaborate with all members of the technical staff, both analog and digital, regarding overall project development progress and status Solid understanding of RTL design, CDC, ASIC synthesis, timing analysis and CDC, P&R, UPF and system Verilog (assertion) Solid understanding of Verilog, TCL and Perl/Python/XML programming languages Experience in platform-based development. Working on platform development is an added advantage Understanding of digital architecture trade-offs for power, performance, and area Solid track record of releasing complex ICs to market Goal and outcome-focused with the ability to handle multiple projects within the team Ability to clearly articulate issues, challenges, and concerns to all levels of management Must have good written and verbal cross-functional communication skills Experience with microprocessor interconnects and integrating peripherals into the interconnect #LI-VS1

In this role, you will focus on the following

Perform trade-off analysis between different architecture options Perform benchmarking of platform components Ownership of defining and deploying platform front end tool flow The candidate will work on digital design architecture, digital RTL, low power design, synthesis and timing analysis, Physical Design interface using state of the art RTL2GDS flows for IPs and full chip design The candidate will be able to work as part of a large and focused team of engineers and will be able to collaborate successfully as needed with design architects, digital verification, project management, and digital and analog design teams in multiple worldwide geographies Implement micro-architecture to RTL implementation with the refining of features requirements throughout the design process Work with methodology development teams to establish, streamline and enhance new and existing development methods, coding process and integration flows #LI-VS1

onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

More details about our company benefits can be found here:

https://www.onsemi.com/careers/career-benefits

We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.