Emulation

Strong in UVM, System Verilog (10 years and above) Writing C-based code for verification at SoC level Analyze and debug simulation failures for SoC subsystems and SOC top level tests Experienced in DDR, PCIE, AXI protocols Familiar with cadence simvision, and emulation using Palladium (preferred) Strong interpersonal and communication skills Experience 2 to 12 Years Education BE/ ME/ B.Tech/ M.Tech/ MS Location Bengaluru, Ahmedabad, Bhubaneswar, Noida, Hyderabad, Pune, Onsite in India .