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About the role
Design Verification Engineer PQAngels Technologies Pvt Ltd Experience: 4-11 Years | Location: Bengaluru, Hyderabad, Chennai | Employment Type: Full-Time About PQAngels PQAngels is a product engineering company built for the silicon-to-software stack. Founded by engineers, we help customers accelerate innovation through Semiconductor, ASIC, VLSI, Embedded and Product Engineering services. Role Summary We are seeking experienced Design Verification Engineers with strong UVM expertise for SoC/IP verification. Key Responsibilities Develop verification plans. Build reusable UVM environments. ¢ Functional coverage closure. ¢ Assertions and debugging. ¢ Regression execution. ¢ Testbench development. ¢ Root cause analysis. ¢ Protocol verification. ¢ Customer interactions. ¢ Documentation. ¢ Verification signoff activities. ¢ Collaborate with RTL and PD teams. Mandatory Technical Skills ¢ SystemVerilog ¢ UVM ¢ SVA ¢ Functional Coverage ¢ Protocol Verification (AMBA , AXI, APB, AHP, PCIe, DDR, USB, Ethernet) ¢ Python/TCL EDA Tools ¢ VCS ¢ Xcelium ¢ QuestaSim ¢ Verdi Qualifications Bachelor's or Master's degree in Electronics, Electrical, ECE, VLSI, Microelectronics or related field. Soft Skills Strong communication, analytical thinking, stakeholder management, problem solving and ability to work in global teams. Why Join PQAngels ? Work on advanced semiconductor projects, collaborate with experienced engineers and gain exposure to global customers. 1. Onsite Opportunities 2. Fixed Pay 3. Health Insurance 4. Relocation Assistance Candidate Information Required Updated Resume, Total Experience, Relevant Experience, Current Company, Current CTC, Expected CTC, Notice Period, Current Location and Preferred Location.