GPU Design Verification Engineers

As a GPU Functional Verification Engineer at Qualcomm, your role will involve: - Developing a deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces - Strategizing, brainstorming, and proposing a DV environment, developing test bench, owning test plan, debugging all RTL artifacts, and achieving all signoff matrices - Engaging with EDA vendors to explore new and innovative DV methodologies to push the limits of sign off quality - Collaborating with worldwide architecture, design, and systems teams to achieve all project goals Qualifications required for this role include: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience - Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience - PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience As a GPU Functional DV (Clock/Power) Verification Engineer, your responsibilities will include: - Understanding GPU power and clock domains with power-up/down sequences - Owning end-to-end DV tasks from coding Test bench and test cases, writing assertions, debugging simulations, and achieving all coverage goals - Developing a test plan to verify sequences and design components for Clock and power management modules - Exploring innovative DV methodologies (formal and simulation) to continuously push the quality and efficiency of test benches Qualifications required for this role include: - Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology - Experience in formal/static verification methodologies will be a plus - Basic understanding of low power design techniques - Experience with Synopsys NLP (native Low Power) tool - Experience with scripting languages such as Perl, Python is a plus In both roles, excellent communication skills are essential for successful collaboration with worldwide design, silicon, and architecture teams to achieve all project goals. As a GPU Functional Verification Engineer at Qualcomm, your role will involve: - Developing a deep understanding of 3-D Graphics hardware pipeline, feature sets, data paths, block functionalities & interfaces - Strategizing, brainstorming, and proposing a DV environment, developing test bench, owning test plan, debugging all RTL artifacts, and achieving all signoff matrices - Engaging with EDA vendors to explore new and innovative DV methodologies to push the limits of sign off quality - Collaborating with worldwide architecture, design, and systems teams to achieve all project goals Qualifications required for this role include: - Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience - Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience - PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience As a GPU Functional DV (Clock/Power) Verification Engineer, your responsibilities will include: - Understanding GPU power and clock domains with power-up/down sequences - Owning end-to-end DV tasks from coding Test bench and test cases, writing assertions, debugging simulations, and achieving all coverage goals - Developing a test plan to verify sequences and design components for Clock and power management modules - Exploring innovative DV methodologies (formal and simulation) to continuously push the quality and efficiency of test benches Qualifications required for this role include: - Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology - Experience in formal/static verification methodologies will be a plus - Basic understanding of low power design techniques - Experience with Synopsys NLP (native Low Power) tool - Experience with scripting languages such as Perl, Python is a plus In both roles, excellent communication skills are essential for successful collaboration with worldwide design, silicon, and architecture teams to achieve all project goals.