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Job Description - Front-End implementation of SERDES high speed Interface PHY/Controller designs - RTL development including tool flows like lint, CDC, Conformal low power and DFT checks - Work closely with functional verification teams on test-plan development and debug. - Understand timing constraints, run synthesis and deliver synthesized netlist to PD team and provide constraints support for PD teams. - UPF writing, power aware equivalence checks and low power checks. - DFT insertion and ATPG analysis meeting Automotive coverage targets. - Provide support to SoC integration and chip level pre/post-silicon debug. Job Description - Front-End implementation of SERDES high speed Interface PHY/Controller designs - RTL development including tool flows like lint, CDC, Conformal low power and DFT checks - Work closely with functional verification teams on test-plan development and debug. - Understand timing constraints, run synthesis and deliver synthesized netlist to PD team and provide constraints support for PD teams. - UPF writing, power aware equivalence checks and low power checks. - DFT insertion and ATPG analysis meeting Automotive coverage targets. - Provide support to SoC integration and chip level pre/post-silicon debug.
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