SRAM Layout Engineer

Position Summary Must have 4 - 8 years of experience in SRAM Layout in advanced CMOS process Should be able to perform SRAM Memory layout development and physical verification activities for complex designs as per provided specifications. Should have expertise in layout area and routing optimization, design rules, yield and reliability issues. Good understanding of layout fundamentals i.e. Electro-migration, Latch-up, coupling, crosstalk, IR-drop, parasitic analysis, matching, shielding, etc. Should have adequate knowledge of schematics, interface with circuit designer and CAD team. Understanding layout effects on the circuit such as speed, capacitance, power and area etc., Skills and Qualifications Experience 4 to 8 Years of experience Qualifications B.Tech/B.E/M.Tech/M.E Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.