RTL DESIGN INTERNSHIP

About the program n RTL Register Transfer Level Design Internship is a hardware design internship focused on developing and verifying digital circuits using Hardware Description Languages HDLs such as Verilog or SystemVerilog. These internships are common in VLSI, semiconductor, FPGA, and ASIC industries. What You Learn in an RTL Design Internship Core Concepts Digital Electronics CMOS and VLSI basics Sequential and combinational circuits FSM Finite State Machine design Timing concepts setup, hold, clock domains Languages Tools Verilog SystemVerilog VHDL sometimes Simulation tools: ModelSim QuestaSim Vivado Cadence tools FPGA development boards Common Internship Tasks Writing RTL code for modules Designing counters, ALUs, FIFOs, UART, SPI, etc. Running simulations and debugging waveforms Functional verification Writing testbenches Synthesis and timing analysis Perks Internship Completion Certificate Who can apply? Only those candidates can apply who: are from M. Tech. / M.E and specialisation from Electronics and Communication Engineering are available for duration of 8 Weeks have relevant skills and interests Terms of Engagement As per Shivay Software Solutions Private Limited Number of openings 10