ASIC Verification Engineer

As an ASIC Verification Engineer, you will be responsible for ensuring the accuracy and reliability of ASIC designs. You will develop and implement test plans, create verification environments, and use simulation tools to verify design specifications. This role requires strong skills in SystemVerilog, UVM methodology, and experience with digital verification methodologies. Key Responsibilities: Develop test plans and verification environments for ASIC projects. Conduct simulation and debug of complex ASIC designs. Work with design engineers to identify and resolve issues. Qualifications: Proficiency in SystemVerilog, UVM, and digital simulation tools. Bachelor s or Master s degree in Electrical Engineering, Computer Engineering, or related field.