Design Verification(SoC)

As a Design Verification Engineer at Sisoc Semiconductor, you will be responsible for SoC & IP Verification using SystemVerilog and UVM methodologies. Your key responsibilities will include verification of PCIe, Ethernet, and DDR interfaces. Qualifications required for this role include: - Hands-on experience in SoC and IP Verification - Proficiency in SystemVerilog and UVM - Familiarity with PCIe, Ethernet, and DDR protocols As a Physical Design Engineer at Sisoc Semiconductor, your primary focus will be on full chip implementation using tools like Innovus. You will also be involved in EM/IR analysis to ensure design reliability. Qualifications required for this role include: - 4+ years of experience in physical design - Expertise in tools like Innovus - Experience with EM/IR analysis As an STA Engineer at Sisoc Semiconductor, you will be responsible for static timing analysis and timing closure activities. Your role will involve ensuring sign-off readiness for the design. Qualifications required for this role include: - Strong background in static timing analysis - Experience with timing closure activities - Knowledge of sign-off procedures As a DFT Engineer at Sisoc Semiconductor, you will work on scan, ATPG, and MBIST implementations for DFT validation. Your role will involve ensuring the effectiveness of DFT strategies. Qualifications required for this role include: - Proficiency in DFT methodologies - Hands-on experience with scan, ATPG, and MBIST - Ability to validate DFT implementations As an ASIC RTL Engineer at Sisoc Semiconductor, you will be involved in SoC design and integration using Verilog and SystemVerilog. Your responsibilities will include RTL development for various ASIC projects. Qualifications required for this role include: - Strong background in SoC design and integration - Proficiency in Verilog and SystemVerilog - Experience with RTL development Interested candidates can share their updated resume to nareshkumar.g@sisocsemi.com. As a Design Verification Engineer at Sisoc Semiconductor, you will be responsible for SoC & IP Verification using SystemVerilog and UVM methodologies. Your key responsibilities will include verification of PCIe, Ethernet, and DDR interfaces. Qualifications required for this role include: - Hands-on experience in SoC and IP Verification - Proficiency in SystemVerilog and UVM - Familiarity with PCIe, Ethernet, and DDR protocols As a Physical Design Engineer at Sisoc Semiconductor, your primary focus will be on full chip implementation using tools like Innovus. You will also be involved in EM/IR analysis to ensure design reliability. Qualifications required for this role include: - 4+ years of experience in physical design - Expertise in tools like Innovus - Experience with EM/IR analysis As an STA Engineer at Sisoc Semiconductor, you will be responsible for static timing analysis and timing closure activities. Your role will involve ensuring sign-off readiness for the design. Qualifications required for this role include: - Strong background in static timing analysis - Experience with timing closure activities - Knowledge of sign-off procedures As a DFT Engineer at Sisoc Semiconductor, you will work on scan, ATPG, and MBIST implementations for DFT validation. Your role will involve ensuring the effectiveness of DFT strategies. Qualifications required for this role include: - Proficiency in DFT methodologies - Hands-on experience with scan, ATPG, and MBIST - Ability to validate DFT implementations As an ASIC RTL Engineer at Sisoc Semiconductor, you will be involved in SoC design and integration using Verilog and SystemVerilog. Your responsibilities will include RTL development for various ASIC projects. Qualifications required for this role include: - Strong background in SoC design and integration - Proficiency in Verilog and SystemVerilog - Experience with RTL development Interested candidates can share their updated resume to nareshkumar.g@sisocsemi.com.