Source description
About the role
As an Analog Design Architect at Synopsys, you will play a crucial role in driving the development of high-performance Die-to-Die (D2D) IPs, enabling customer chiplet-based system design wins across various industries. Your responsibilities will include designing and evaluating PHY analog components for pre-silicon and post-silicon validation, leading the definition of next-generation Die-to-Die IP architectures, customizing PHY designs to meet client requirements, and collaborating with cross-functional teams for seamless integration within SoC environments. Additionally, you will provide technical leadership, guidance, and mentorship to junior engineers to foster a culture of innovation and continuous improvement. Key Responsibilities: - Drive the development of high-performance Die-to-Die (D2D) IPs for customer chiplet-based system design wins. - Design and evaluate PHY analog components for pre-silicon and post-silicon validation. - Lead the definition of next-generation Die-to-Die IP architectures. - Customize PHY designs to address specific client requirements and optimize for performance, power, and area (PPA) targets. - Perform design trade-offs and implement advanced flows and methodologies to streamline the analog design process. - Collaborate with cross-functional teams for seamless integration of analog and digital components within SoC environments. - Provide technical leadership, guidance, and mentorship to junior engineers to foster innovation and continuous improvement. Qualifications Required: - 15+ years of experience in PHY analog design for pre-silicon and post-silicon validation. - Deep knowledge of physical IP such as SERDES, DDR/HBM, or Die-to-Die IO interfaces. - Proficiency in design trade-offs, advanced flows, and industry-leading design methodologies. - Strong documentation skills for communicating specifications to internal teams and external customers. - Ability to collaborate across multi-site teams and troubleshoot complex mixed-signal interface challenges. - Hands-on experience with industry-standard design tools and EDA software. - Strong problem-solving abilities and strategic technical decision-making skills. - Excellent written and verbal communication skills for working in cross-functional, globally dispersed teams. - PhD or MSc in Electrical Engineering with 15+ years of analog IC design experience. - Bonus skills: Layout effects expertise, Verilog-A for analog behavioral modeling, and proficiency in scripting languages. Join a dynamic and innovative team at Synopsys focused on designing high-performance PHY analog components. Collaborate with cross-functional groups to deliver cutting-edge IP solutions for a global customer base. Benefit from a culture of continuous learning, knowledge sharing, and support, where every team member has the opportunity to grow and shape the future of semiconductor technology. As an Analog Design Architect at Synopsys, you will play a crucial role in driving the development of high-performance Die-to-Die (D2D) IPs, enabling customer chiplet-based system design wins across various industries. Your responsibilities will include designing and evaluating PHY analog components for pre-silicon and post-silicon validation, leading the definition of next-generation Die-to-Die IP architectures, customizing PHY designs to meet client requirements, and collaborating with cross-functional teams for seamless integration within SoC environments. Additionally, you will provide technical leadership, guidance, and mentorship to junior engineers to foster a culture of innovation and continuous improvement. Key Responsibilities: - Drive the development of high-performance Die-to-Die (D2D) IPs for customer chiplet-based system design wins. - Design and evaluate PHY analog components for pre-silicon and post-silicon validation. - Lead the definition of next-generation Die-to-Die IP architectures. - Customize PHY designs to address specific client requirements and optimize for performance, power, and area (PPA) targets. - Perform design trade-offs and implement advanced flows and methodologies to streamline the analog design process. - Collaborate with cross-functional teams for seamless integration of analog and digital components within SoC environments. - Provide technical leadership, guidance, and mentorship to junior engineers to foster innovation and continuous improvement. Qualifications Required: - 15+ years of experience in PHY analog design for pre-silicon and post-silicon validation. - Deep knowledge of physical IP such as SERDES, DDR/HBM, or Die-to-Die IO interfaces. - Proficiency in design trade-offs, advanced flows, and industry-leading design methodologies. - Strong documentation skills for communicating specifications to internal teams and external customers. - Ability to collaborate across multi-site teams and troubleshoot complex mixed-signal interface challenges. - Hands-on experience with industry-standard design tools and EDA software
More at Synopsys
Related open roles
Sr. Staff Engineer-Emulation/Validation- PCI/CXL/DDR/Ethernet (India)
India
Physical Design, Principal Engineer (Bengaluru)
Bangalore
SOC Engineering, Sr Staff Engineer- RTL Design
Delhi NCR
Applications Engineering, Principal Engineer (Noida)
Delhi NCR
Analog Design Staff Engineer
Hyderabad
Principal Engineer- ASIC Digital Design (Die to Die Communication protocol)
India