Architect 3DIC Compiler & System Signoff

Role Overview We are looking for a seasoned semiconductor expert to drive deployment and evolution of next-generation 3DIC design and signoff solutions for advanced packaging, chiplet-based architectures, HBM, and heterogeneous integration. This role requires close collaboration with R&D, Product Engineering, and strategic customers to solve complex design challenges, influence product direction, and enable successful adoption of cutting-edge 3DIC technologies. Key Responsibilities Drive technical engagements involving 3DIC implementation and system-level signoff methodologies.Partner with R&D to define, validate, and enhance next-generation product capabilities.Develop and deploy best-practice flows for multi-die, chiplet, and advanced packaging designs.Analyze and debug customer designs involving implementation, timing, power, reliability, and package-aware challenges.Influence product roadmap through customer feedback, competitive insights, and technology trends.Mentor internal teams and serve as a technical authority for strategic customer engagements. Required Expertise Candidates should demonstrate deep expertise in both: 3DIC ImplementationMulti-die/chiplet integrationFloorplanning and partitioningPhysical design closurePackage-aware implementationAdvanced packaging methodologies3DIC System SignoffTiming signoffPower integrity and EMIRReliability signoffPackage-die co-analysisSignoff closure for advanced-node designsDesired Exposure Working knowledge of one or more MultiPhysics domains: Thermal analysisElectro-thermal analysisPackage reliability and warpage Preferred Background 15+ years in semiconductor design, EDA, product engineering, or signoff methodologies.Strong experience with advanced-node SoCs, chiplets, HBM, 2.5D/3DIC, or advanced packaging technologies. Ideal Candidate A hands-on technical leader who has successfully driven 3DIC implementation and signoff for production silicon, understands emerging chiplet ecosystems, and can bridge customer challenges with product innovation while maintaining strong technical depth as an individual contributor. .