Source description
About the role
We Are: At Synopsys, we drive innovations that shape the way we live and connect. Our technology powers chip design, verification, and IP integration—enabling high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. **Alternate locations include: Markham, ON; Mississauga, ON; Ottawa–Nepean, ON; and Boxborough, Massachusetts (U.S.) You Are: You are an experienced ASIC digital designer or verifier who thrives on solving complex technical challenges. You have strong Verilog and scripting skills, understand front-end flows, and enjoy collaborating with diverse teams. Your curiosity and adaptability help you grow and deliver outstanding support to customers and colleagues. What You’ll Be Doing: Creating and debugging test benches and test cases. Running RTL and gate-level simulations. Supporting application engineers and customers on HBM/DDR PHY topics. Contributing to technical documentation. Driving product improvements based on customer feedback. The Impact You Will Have: Accelerate deployment of HBM and DDR PHY IP solutions. Enhance product reliability and customer satisfaction. Support innovation through expert guidance. Improve Synopsys’ products with your insights. Build lasting customer relationships. What You’ll Need: The ideal candidate will specialize in one of the following, experience in multiple areas would be a bonus:
ASIC RTL design and verification experience. Verilog, PERL, TCL, Python skills. Static timing analysis and synthesis knowledge. Simulation and debugging abilities. HBM/DDR protocol experience is an asset. Who You Are: Analytical, collaborative, adaptable. Strong communicator and problem solver. Customer-focused and proactive. The Team You’ll Be A Part Of: Join our R&D Professional team, specializing in mixed-signal ASIC development and supporting HBM/DDR PHY IP customers. You’ll work with experts in design, implementation, and verification. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will share more details about salary and perks during the hiring process. #LI-DP1
More at Synopsys
Related open roles
Sr. Staff Engineer-Emulation/Validation- PCI/CXL/DDR/Ethernet (India)
India
Physical Design, Principal Engineer (Bengaluru)
Bangalore
SOC Engineering, Sr Staff Engineer- RTL Design
Delhi NCR
Applications Engineering, Principal Engineer (Noida)
Delhi NCR
Analog Design Staff Engineer
Hyderabad
Principal Engineer- ASIC Digital Design (Die to Die Communication protocol)
India