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analog semiconductors · embedded processing

Lead Analog/Rf IC Design Engineer UWB Transceiver | PLL | TX Design

IndiaPosted 3 months ago
Electrical Electronics And Computer Hardware EngineeringSeniorFull Time; Regular
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As a Lead Analog/RF IC Design Engineer at Texas Instruments in Bangalore, India, you will play a crucial role in designing cutting-edge UWB transceiver SoCs. You will be involved in the full product design lifecycle, from conceptualization to silicon test and verification. This is a high-ownership position with the opportunity to specialize in one of three tracks within the UWB Design Group. Possible Role Tracks: - Track 1 PLL & Clock System Design - Architecture and design of Crystal Oscillators, Integer/Fractional PLLs, and LO Distribution Systems - Ensure low phase noise, fast lock time, and robust performance across PVT corners - Design and simulate PLL loop dynamics, VCO, dividers, and charge pumps - Track 2 IF Filter & VGA Design - Design of Intermediate Frequency (IF) filters and Variable Gain Amplifiers (VGA) - Optimize linearity, noise, and bandwidth for the receive chain - Support calibration modules AGC, gain, offset, IQMM - Track 3 Transmitter (TX) Design - Full TX chain design DAC, baseband filters, up-conversion mixers, and Power Amplifier (PA) stages - Drive TX pin performance across EVM, output power, spectral mask, and linearity specs - Support calibration and power management for low-power TX operation Key Responsibilities (All Tracks): - Lead block-level architecture definition in collaboration with systems team - Execute concept design, schematic, layout, and extracted simulations (Cadence Virtuoso) - Perform design verification and silicon bring-up correlate simulations with silicon measurements - Support test & characterization with the validation team - Mentor junior engineers and drive design quality and methodology improvements - Contribute to patent filings and technical publications Minimum Requirements: - Bachelor's/Master's degree in Electronics/Electrical Engineering or related field - 310 years of hands-on analog/RF IC design experience with demonstrated full design cycle exposure - Strong proficiency in analog/RF circuit design LNA, mixers, filters, PLL, PA, or VGA - Experience with Cadence Virtuoso schematic, layout, and post-extraction simulation - Solid understanding of RF system parameters NF, gain, linearity, phase noise, EVM - Strong debugging and problem-solving skills across design and silicon Preferred Qualifications: - Experience in UWB, WLAN/WiFi, or microwave frequency (710 GHz) IC design - Expertise in PLL design VCO, charge pump, fractional-N, loop filter - Experience in TX chain design DAC, upconversion mixer, PA, spectral mask compliance - Knowledge of calibration techniques AGC, PDET, IQ mismatch correction - Familiarity with low-power design and power management (LDO, low-current modes) - PCB-level understanding for solution and validation board design - Strong verbal and written communication skills - Passion for patent authorship and domain leadership This role offers you the opportunity to work on UWB technology, impacting automotive, mobile, and industrial applications globally. You'll be part of a collaborative, innovation-driven environment with ample opportunities for growth and recognition. If you are passionate about analog/RF circuit design and ready to lead UWB IC design at Texas Instruments in Bangalore, this is the defining opportunity for you. As a Lead Analog/RF IC Design Engineer at Texas Instruments in Bangalore, India, you will play a crucial role in designing cutting-edge UWB transceiver SoCs. You will be involved in the full product design lifecycle, from conceptualization to silicon test and verification. This is a high-ownership position with the opportunity to specialize in one of three tracks within the UWB Design Group. Possible Role Tracks: - Track 1 PLL & Clock System Design - Architecture and design of Crystal Oscillators, Integer/Fractional PLLs, and LO Distribution Systems - Ensure low phase noise, fast lock time, and robust performance across PVT corners - Design and simulate PLL loop dynamics, VCO, dividers, and charge pumps - Track 2 IF Filter & VGA Design - Design of Intermediate Frequency (IF) filters and Variable Gain Amplifiers (VGA) - Optimize linearity, noise, and bandwidth for the receive chain - Support calibration modules AGC, gain, offset, IQMM - Track 3 Transmitter (TX) Design - Full TX chain design DAC, baseband filters, up-conversion mixers, and Power Amplifier (PA) stages - Drive TX pin performance across EVM, output power, spectral mask, and linearity specs - Support calibration and power management for low-power TX operation Key Responsibilities (All Tracks): - Lead block-level architecture definition in collaboration with systems team - Execute concept design, schematic, layout, and extracted simulations (Cadence Virtuoso) - Perform design verification and silicon bring-up correlate simulations with silicon measurements - Support test & characterization with the validation team - Mentor

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