AI/ML Software, Firmware and SI Design, DV Engineers

About Tsavorite Scalable Intelligence Inc. Tsavorite Scalable Intelligence is developing the semiconductor industrys first Omni Processing Unit (OPU) a unified platform that brings together CPU, GPU, Memory and Connectivity in a single device, engineered for the next wave of Agentic AI workloads. Our goal is to redefine how AI infrastructure meets performance, efficiency, and scale whether at the Datacenter, Cloud or Edge. Founded in 2023, Tsavorite is powered by 125+ seasoned engineers and leaders who have built transformative products and companies. We are moving rapidly from vision to reality, with over $100 million in customer pre-orders, engagements spanning the Americas, Europe and Asia, and working prototypes delivered to customers and developers. We deliver a fullstack solution: from Compilers, ML libraries and Runtime software to a Hardware platform designed to let you run any AI model or workflow without platformspecific porting constraints. Join Our Growing Team! Were building a worldclass team focused on AI silicon and software innovation. Positions are open in the US and in Bangalore (India). Note: A minimum of 5 years+ of industry work experience is required to be considered for the below positions. ML SW Engineer Positions (multiple positions available in the below areas) ML Backend Compiler Engineers with MLIR, LLVM experience ML with PyTorch & ONNX ML Framework Experience ML engineers with expertise in LLMs, CNN, RNN Inference, and Training ML Runtime Engineers with Level Zero and Scheduler experience Performance Engineer with indepth understanding of ML Model Architecture & Computational requirements. Experience with performance analysis tools and methodologies. ML Engineer Multimodal AI and Inference: Strong background in deep learning and model deployment with handson experience in PyTorch or TensorFlow. Expertise in Model optimization with quantization, pruning, distillation or mixedprecision inference. Practical knowledge of inference engines (vLLM, llama.cpp, ONNX Runtime). Experience in deploying large models locally or on edge devices with limited memory/compute constraints. AI Applications Engineer with fullstack web application development experience, including proficiency in Frontend frameworks (React, Next.js, Svelte) and Backend experience with Python (FastAPI/Flask), Node.js, Rust. Experience with interfacing with AI/ML backend via REST or gRPC APIs. Experience building apps that integrate LLMs, texttoimage, or speech models. Familiarity with multimodal data handling audio/video streaming, file parsing, camera/mic APIs DevOps/Edge AI Engineer strong background in Linux systems engineering and containerization (Docker, Podman, LXC). Experience in deploying AI Inference Services locally or at the edge (llama.cpp, ollama, vLLM, ONNX). Experience with embedded systems or edge AI devices (e.g., Jetson, Coral). Solid understanding of Networking, Security, and firewall configurations for local appliances. System SW and Firmware Engineers (multiple positions available) Systems Security(SW) Engineer with strong knowledge and handson experience with Linux Kernel and User space security aspects; Trusted firmware, Secure Boot, Boot loader, Crypto coprocessors e.g. CMRT (Root of Trust). Systems Platform Engineer with strong knowledge of Linux kernels, IPC/System V, POSIX libraries, multithreaded SW and process management. Systems Engineer with experience in writing device driver for Memory, Control Plane and Cluster Management, with excellent knowledge of Linux kernels, IPC/System V, Memory management and distributed systems, Linux High availability, and NUMA. Systems SW Engineer with experience in developing health monitoring, Linux drivers, and memory checker debug frameworks. Systems SW Engineer with Experience in cluster management software and device discovery protocols like PAXOS, NCCL, RCCL, or any other distributed device discovery. Firmware Engineer with experience in writing device drivers for RDMA, RoCE v2, Ethernet, CXL, and other proprietary interfaces. Handson experience with microarchitecture and RTL development of ARM CPU Processors or highspeed custom ASICs/Accelerators. RTL design expertise with any one of - Cache controllers, IO interfaces (PCIe, CXL, Ethernet), UCIe, Memory Controllers, Display, and Video Encoding/Transcoding IP designs. Design Verification Engineers (Multiple positions available under each domain) Deep expertise and handson experience in developing UVM, SV testbench components, Checkers, Scoreboard and Stimulus with 5yr+ experience in IP/subsystem or SoC level verification. Experience in defining test plans and developing directed/constrained random tests to achieve Coverage. SoC DV with focus on system bringup, infrastructure correctness, and debug/interrupt subsystems. Fullchip and multichiplet with realsilicon mindset verification. Multiple positions available for candidates with PCIe/CXL .