DFT Engineer

Title- DFT Engineer Experience- 5+ Location- Bangalore Key Responsibilities • Define and implement DFT strategies including Scan Insertion, ATPG, MBIST/BIST, Boundary Scan, and JTAG. • Collaborate with RTL, Verification, Physical Design, and STA teams for seamless DFT integration • Develop and validate test plans, test infrastructure, and test patterns • Perform ATPG, coverage analysis, and fault diagnosis • Support silicon bring-up , debug test failures, and drive yield improvement • Ensure DFT implementation meets manufacturing and DFM constraints • Document DFT flows, architectures, and scripts; mentor junior engineers as needed. Key Skills (Must-Have) Strong hands-on experience in DFT / SoC Test Design Expertise in Scan Insertion, ATPG, MBIST/BIST, Boundary Scan, JTAG Experience with EDA DFT tools (Synopsys / Siemens / Cadence) Good understanding of RTL (Verilog/SystemVerilog) and ASIC/SoC flows Exposure to DFT-GLS, coverage analysis, and post-silicon debug Scripting skills ( Python / Perl / TCL ) are a plus