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About the role
Physical Layer and Protocol layer experience on AT LEAST ONE High speed SERDES on PCIe / CXL/UCIe / Ethernet. Debug skills and Experience in using lab equipment such as Oscilloscopes,Bit Error Rate Testers,Protocol Exercisers,Analyzers Minimum Qualifications: 2-7 years (with Btech) or 5 years (with Mtech) experience in Post-Silicon PHY,Systems Interop and Compliance testing.
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