Padmi

STA Lead(Synthesis and Static Timing Analysis.)5+yr-Vinay-HCL

BangalorePosted 30 days ago
Electrical Electronics And Computer Hardware EngineeringSenior
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Company:HCL Location:Bangalore Please share 5+yrs STA lead profiles, location Bangalore. Below is the JD for STA Lead 5+yrs. Please share the resource on priority. STA / Synthesis (Design Implementation) Lead LD: ● Hand-on Experience and Comprehensive knowledge of Synthesis and Static Timing Analysis. ● Hands-on experience on Logical aware Synthesis, Logical Equivalence check and Static Timing analysis. ● Hands-on the DMSA flow to fix pre and post STA timing. ● Knowledge on the Timing closure on Sub system level & Block level and Chip level. ● Knowledge on Writing Manual ECO’s to fix timing violations and DRC’s. ● Knowledge on constraint development. ● Good Knowledge of TCL scripting and UNIX env. ● Leading the team 4 to 5 team members by guiding and mentoring on the STA /Synthesis. ● Should Co-ordinate with design team counterparts in RTL design, Physical design and DFT. ● Good communication skills and client interface role.

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