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About the role
Title: DFX Verification Exp:4 to 10 yrs Location: Bangalore Key Responsibilities Develop and execute verification plans for DFx features including: Scan (stuck-at, transition fault) MBIST / LBIST Boundary Scan (JTAG) Memory repair and redundancy Low-power test scenarios Create and maintain testbenches using SystemVerilog/UVM for DFx validation Verify: Scan chain integrity and connectivity Test mode functionality and coverage ATPG pattern validation and debug BIST controllers and memory test logic Technical Skills Strong knowledge of: DFT concepts (Scan, ATPG, MBIST, JTAG) Digital design fundamentals Expertise in: SystemVerilog and UVM Simulation tools (VCS, Xcelium, Questa) Familiarity with: ATPG tools (TetraMAX, Modus, FastScan) Debug tools (Verdi, DVE) Understanding of: Low-power design (UPF/CPF) Clocking and reset strategies
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