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About the role
Job Title: STA Engineer PrimeTime Experience: 5+ Years Location: Bangalore Job Description We are looking for an experienced STA Engineer with 5+ years of experience in Static Timing Analysis for complex SoC / ASIC designs. The ideal candidate should have strong hands-on expertise in timing analysis, timing closure, and signoff activities using Synopsys PrimeTime . Key Responsibilities Perform block-level / full-chip Static Timing Analysis (STA) for SoC / ASIC designs Handle setup/hold analysis, timing closure, ECO support, and signoff checks Work on timing constraints validation, clock analysis, and path-based timing analysis Analyze and fix timing violations in coordination with PD, RTL, and design teams Support pre-layout and post-layout STA activities Perform timing signoff, SI analysis, and low-power timing checks Collaborate with cross-functional teams for tapeout readiness Required Skills: 5+ years of experience in STA / Timing Signoff Strong hands-on experience in Synopsys PrimeTime Good knowledge of timing constraints, setup/hold analysis, ECO flow, and timing closure Experience in pre-layout / post-layout STA Familiarity with SI, low-power checks, and MMMC flow Good understanding of ASIC/SoC physical design flow Strong debugging, analytical, and communication skills
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